# CoreS3 overlay for the pinned upstream component. Let ESP-IDF select Xtensa
# flags; the upstream CMakeLists.txt forces RISC-V flags and depends on main.
idf_component_register(
    SRCS spc700.c memmap.c apu.c globals.c c4emu.c cpuops.c dsp1emu.c
         srtc.c apu_blargg.c clip.c cpu.c gfx.c soundux.c cpuexec.c
         obc1.c dsp2emu.c tile.c ppu.c dma.c save.c c4.c dsp1.c getset.c
    INCLUDE_DIRS ".."
    REQUIRES heap esp_timer
)
target_compile_options(${COMPONENT_LIB} PRIVATE
    -O3 -Wno-format -Wno-unused-const-variable
)
